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About us

Our mission at the Parallel System Architecture Laboratory is to pioneer cutting-edge computer architectures and systems that maximize performance and efficiency. We target a wide range of systems, from high-performance servers to low-power edge devices, with a particular focus on parallel and scalable designs. We achieve the goal through innovative design and optimization approaches that span hardware and software layers.

[2024, Oct.]

Our paper, "ONNXim: A Fast, Cycle-level Multi-core NPU Simulator," has been accepted for publication in IEEE Computer Architecture Letters (CAL). Congratulations!

[2024 Sep.]

Our paper, "Non-Invasive, Memory Access-Triggered Near-Data Processing for DNN Training Acceleration on GPUs," has been accepted for publication in IEEE Access. Congratulations!

[2024 Jul.]

Our paper, "Low-overhead General-purpose Near-Data Processing in CXL Memory Expanders," has been accepted to MICRO'24. Congratulations!

[2024 Jun.]

Our fast and detailed multi-core NPU simulator, called ONNXim, is released (link).

[2023 Oct.]

Our paper, "Bandwidth-Effective DRAM Cache for GPUs with Storage-Class Memory," has been accepted to HPCA'24. Congratulations!

[2023 Sep.]

Jinhoon Bae and Okkyun Woo have joined our team. Welcome!

News
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POSTECH (RIST #4304)
67 Cheongam-Ro, Nam-Gu, Pohang, Gyeongbuk, Korea 37673

Tel: +82 54 279 2912

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